Speaker
Description
Phase-2 CMS will replace the trigger and data acquisition system in preparation for the HL-LHC. This upgrade will allow a maximum accept rate of 750kHz and a latency of 12.5us. To achieve this, new electronics and firmware are being designed. We describe the first version of an algorithm capable of detecting and identifying muon showers, running in the first layer of the trigger system.
It was designed to be implemented on FPGAs with minimum resource utilization, increasing the robustness of the current algorithm. This will allow to recover efficiency compared to the current algorithm at high pt muons.
Summary (500 words)
The muon trigger is a multi-layer system designed to reconstruct and measure the momenta of the muons by correlating information across muon chambers on the muon track finders. This is achieved with pattern recognition algorithms that run on FPGA processors(Phase2). The first layer of the Barrel Muon Trigger (BMT Layer-1), reconstructs muon segments (stubs) using the Analytical Method [1]. The Barrel Muon Filter is the second layer of this system, it concentrates the stubs and hits from the barrel muon stations and runs dedicated algorithms to refine and correlate the information of multiple chambers before sending the information to the track finders.
The Analytical Method (AM) produces compatible muon segments (primitives) from adjacent cells. When there are many active cells close, due to high-energy muon showers or other hadronic events, the amount of possible primitives increases exponentially, delaying the process and producing primitives that are not related to the muon, which will then be discarded in the next level of the filter. Additionally, this reconstruction may require a significant amount of time which results in discarded data. In this work we present a possible algorithm to process hits produced by a shower and avoid saturation of the AM. Such an algorithm will allow us to efficiently reconstruct high-energy muons or hadronic events that may be produced by a long-lived particle decaying in the calorimeters.
To recover the maximum information from the events, each hit in a DT is stored during 16BXs (400ns) to account for the maximum drift times. While no shower is produced, the amount of available hits for running the pattern recognition in a given super layer is relatively low. However, in case a muon radiates, the amount of hits increases rapidly. Above a certain threshold we flag an event as a shower, indicating that the output of the AM might not be trusted, while keeping a window open to store the maximum number of hits of the event before storing them and calculating their parameters.
The FPGA implementation is designed to process streamed data, processing up to 8 hits per BX, using a set of circular buffers and registers, allowing to efficiently sort, store, and retrieve data. It will work in parallel to the AM, at 360MHz, without delaying the AM.
This will impact the current system in two ways. First it will be able to process the data that the AM is not able to when saturating, recovering information from highly energetic muons. Secondly, it will reduce the amount of unproductive data by the AM when a shower has occurred.
In order to design and validate the algorithm, a custom simulation of a DT muon station was developed in GEANT4. High-energy muons are then generated using this simulator.
The algorithm correctly identified events as radiating in a SuperLayer +95% of the time, while the rest of the events, having a low number of active cells, are manageable by the AM. Considering the whole station, +99% of the times it correctly identifies the radiating event.
[1]https://doi.org/10.1016/j.nima.2023.168103
