TWEPP 2024 Topical Workshop on Electronics for Particle Physics

Session

Module, PCB and Component Design

Oct 2, 2024, 2:00 PM

Grosvenor Suite Theatre

Conveners

Module, PCB and Component Design

• Johan Alme (University of Bergen (NO))
• Ken Wyllie (CERN)

Module, PCB and Component Design

• Ken Wyllie (CERN)
• Johan Alme (University of Bergen (NO))

Module, PCB and Component Design

• Johan Alme (University of Bergen (NO))
• Ken Wyllie (CERN)

152. Design, Construction, and Testing of the APOLLO ATCA Blades for Use at the HL-LHC

Alexander Madorsky (Boston University (US)), Jonathan Fulcher (Boston University (US)), Dr Rui Zou (Cornell University (US)), Zeynep Demiragli (Boston University (US))

10/2/24, 2:00 PM

Module, PCB and Component Design

Oral

The APOLLO ATCA platform is an open-source design that separates into a generic "Service Module" (SM) and customizable "Command Module" (CM), allowing cost-effective use in applications such as readout of the inner tracker and Level-1 track trigger for the CMS Phase-II upgrade at the HL-LHC. The SM incorporates an intelligent IPMC, robust power entry and conditioning systems, a powerful...

6. Phase-2 CMS DAQ -- Growing from prototype boards to demonstrator systems

Jeroen Hegeman (CERN)

10/2/24, 2:20 PM

Module, PCB and Component Design

Oral

The LHC-synchronous part of the Phase-2 CMS DAQ and timing systems
will be built around two custom ATCA boards, interfacing the
subdetector back-ends to the central trigger-DAQ systems. The DAQ and
Timing Hub provides a 10 Gb/s connection to the central timing system,
and up to 400 Gb/s of DAQ bandwidth. This board can be combined with
one/multiple DAQ800 boards to increase the data...

165. Technical challenges designing a prototype common readout board for LHCb future upgrades

Julien Jiro Langouët (Aix Marseille Univ, CNRS/IN2P3, CPPM, Marseille, France)

10/2/24, 2:40 PM

Module, PCB and Component Design

Oral

The data acquisition system of LHCb Upgrade I is a single stage readout followed by event building, real time reconstruction and selection. The current system already has to process 32 Tbps of data, and this will rise to above 200 Tbps with Upgrade II. The new PCIe Gen 5 readout board called PCIe400 embedding the most powerful altera’s Agilex M-series FPGA and 112 Gbps serial links is the...

149. Development of readout electronics for a high-speed event-driven neutron imaging detector based on Timepix4

Qicai Li (University of Chinese Academy of Sciences, Beijing 100049, China & Institute of High Energy Physics, Chinese Academy of Sciences)

10/2/24, 3:30 PM

Module, PCB and Component Design

Oral

A high-performance event-driven readout electronics system based on Timepix4 has been developed for energy-resolved neutron imaging detectors at China Spallation Neutron Source (CSNS). The system achieves a position resolution better than 55 µm and a timing resolution better than 1 µs. The readout electronics feature a large-capacity cache, high readout bandwidth, and FPGA-based hardware...

142. Design, test and performance of a PicoTDC based board

Davide Falchieri (Universita e INFN, Bologna (IT))

10/2/24, 3:50 PM

Module, PCB and Component Design

Oral

This work describes a custom electronics board (“PicoTDC board”) developed at INFN Bologna, whose goal is to provide fast timing measurements to generic detectors able to test different front-end electronics using a common FMC interface. The fast timing measurements are achieved using 2 PicoTDC ASICs from CERN, providing 128 channels with 3.05 ps LSB. Design choices and performance of the card...

79. Design and Implementation of a Compact Analog Constant Fraction Discriminator for High-Resolution Timing in Gamma-Ray Spectroscopy

Michael Wiebusch (GSI Helmholtzzentrum für Schwerionerforschung GmbH)

10/4/24, 10:30 AM

Module, PCB and Component Design

Oral

This work presents Twin_Peaks_CFD1, a custom analog front-end card designed for the read-out of PMTs coupled to lanthanum bromide scintillators. It integrates 16 discrete analog constant fraction discriminators (CFDs) on a compact 12x10 cm board, providing precise timing information for nuclear lifetime measurements.
The design emphasizes cost-effectiveness, utilizing off-the-shelf discrete...

125. KALYPSO LGAD - A MHz repetition rate line camera based on trench isolated low gain avalanche detector

Meghana Patil (Karlsruhe Institute of Technology)

10/4/24, 10:50 AM

Module, PCB and Component Design

Oral

Designed for accelerator beam diagnostics and photon science applications, KALYPSO is a line array camera that stands out for its high-speed performance with the ability to operate at rates upto 12 Mfps in continuous readout mode while maintaining full occupancy. In this contribution, the KALYPSO system with sensor based on TI-LGAD is presented. The latest version of this system is employed...