Speaker
Description
Caribou is a versatile data acquisition system used in multiple collaborative frameworks (CERN EP R&D, DRD3, AIDAinnova) for both bench-top and test-beam qualification of novel silicon pixel detector prototypes. The system is built around a common hardware, firmware and software base shared accross different projects, thereby drastically reducing the development effort and cost. The current version consists of a custom Control and Readout (CaR) board and a commercial Xilinx Zynq 7000 series Sytem-on-Chip (SoC) platform. The CaR board provides a hardware environment featuring various services such as powering, slow-control and high-speed data links that can be used by the target detector prototype. The SoC platform is based on a ZC706 evaluation board running a fully featured Yocto-based Linux distribution (Poky) and a custom data acquisition software (Peary). Migration to a Zynq UltraScale+ architecture is ongoing with the additional objective of merging the SoC and the CaR board into a single hardware platform. This poster describes the current Caribou system architecture, its capabilities, the user integration workflow, and the foreseen system upgrade.
