Speaker
Description
This work presents the development of a front-end simulation code for the Timepix3 readout chip, intended as digitizer stage in full detector simulation. The front-end electronics is modelled using an integrator stage and 3 parallel feedback loops with individually configurable time constants. The main feedback discharging the integrator consists of 3 low-pass filtered feedback loops. The leakage current compensation is approximated by an additional independent low-pass filtered feed-back loop. The system noise is modelled using independent bandwidth limited noise channels for pre-amplifier, feedback and threshold noise. The Timepix3 time of arrival (ToA) and time over threshold (ToT) measurement is implemented by a discriminator model with independent rise and fall times and 2 independent clock frequencies for ToA and ToT. The measured dependence of the ToT on the pre-amplifier input charge using test-pulses of a Timepix3 assembly is correctly reproduced for a wide range of discriminator settings.
The work has been presented at the IWORID 2023, see https://iopscience.iop.org/article/10.1088/1748-0221/19/03/C03022
| Type of presentation (in-person/online) | in-person presentation |
|---|---|
| Type of presentation (scientific results or project proposal) | Presentation on scientific results |
