Speaker
Description
The project aims to develop key technologies for the vertex detector in future lepton colliders, with a focus on CEPC. This development is crucial for enhancing the physics potential of future lepton colliders.
The current design of the CEPC vertex detector employs curved MAPS technology, inspired by the ALICE ITS3 upgrade. However, new challenges arise in adapting this curved MAPS technology for the CEPC vertex detector. First, the b-layer of the CEPC vertex detector is positioned closer to the beam pipe (with a radius of ~11 mm). Second, the data rate in CEPC is exceptionally high, particularly during Z-pole operation, where the data rate per chip exceeds 1 Gbps, even during low-luminosity Z-pole runs.
To address these challenges, a wafer-scale monolithic sensor with stitching technology needs to be developed to enable fast readout speeds suitable for future lepton colliders. This chip must feature relatively low power consumption and strong radiation hardness to meet performance requirements.
We anticipate that these advancements will make significant contributions to the technical design reports for future lepton collider projects. Collaborative efforts with WG5-TB are planned, leveraging potential synergies in vertex detector development for ALICE, BELLE II, and FCC-ee. A proposal document will be prepared.
| Type of presentation (in-person/online) | in-person presentation |
|---|---|
| Type of presentation (I. scientific results or II. project proposal) | II. Presentation on project proposal |
