Speaker
Brij Kishor Jashal
(RAL, TIFR and IFIC)
Description
In recent years, the incorporation of new hardware architectures at the trigger level has significantly enhanced the potential of LHC experiments. This includes the use of FPGAs and GPUs for real-time fast track reconstruction. In this talk, we will review the key aspects of these advancements, examine current technology trends, and explore the emerging strategies being developed by the high-energy physics community to further increase the data-taking capabilities of LHC experiments.
Author
Brij Kishor Jashal
(RAL, TIFR and IFIC)
