1–5 Sept 2025
ETH Zurich
Europe/Zurich timezone

Acceleration of a Quantized LeNet-based IDS on FPGA using FINN

Not scheduled
1h
HIT G floor (gallery)

HIT G floor (gallery)

Speaker

Ameth Thiam

Description

  1. Introduction and Context

With the rise of cyberattacks and the growing volume of network traffic, intrusion detection systems (IDS) must provide fast, accurate, and resource-efficient analysis. Traditional CPU- or GPU-based solutions often struggle to meet low-latency and low-power requirements, especially in embedded environments.

Integrating artificial intelligence, particularly convolutional neural networks (CNNs), offers new perspectives for improving IDS. However, deploying such models on constrained hardware architectures remains challenging.

In this context, the FINN framework from Xilinx enables efficient execution of quantized neural networks on FPGA. This work evaluates the feasibility and benefits of implementing a quantized LeNet-based CNN IDS, focusing on latency and resource consumption after hardware synthesis.

  1. FINN Framework Overview

FINN is an open-source framework developed by Xilinx, designed for hardware acceleration of quantized neural networks on FPGAs. Unlike traditional CPU/GPU inference frameworks, FINN targets ultra-low latency and high throughput, making it suitable for real-time embedded applications.

The process begins with model training in PyTorch, using the Brevitas library to integrate quantization during learning. The model is then exported to the QONNX format, allowing FINN to optimize it for hardware execution.

FINN applies a series of graph transformations to prepare the model for FPGA synthesis, including computation streamlining, conversion of layers into HLS blocks, and dataflow partitioning. The flow concludes with FPGA bitstream generation and the creation of hardware drivers.

  1. Intrusion Detection System and Preprocessing

We used the DAPT dataset, containing 86,691 network traffic samples labeled across 14 activity classes. Each sample is represented by a 32-dimensional numerical feature vector. The dataset was split into 60,683 training samples and 26,008 test samples, preserving class distribution.

The classification task is multiclass, targeting activities such as web browsing, messaging, and various network attacks. We opted for a 1D-adapted, quantized LeNet CNN suitable for vector-based data.

Preprocessing included feature normalization and label encoding. Training was performed using Brevitas with quantized layers (4-bit weights and activations) to ensure compatibility with FINN. The final model was exported in QONNX format for hardware deployment.

  1. Results and Evaluation

Hardware generation was carried out by configuring the FINN pipeline with a 200 MHz target frequency, a 100 FPS objective, and a ZCU102 FPGA board. After QONNX export and compilation, the estimated pre-synthesis latency was 137.16 µs with a throughput of 19,841 images per second.

After Vivado synthesis, the RTL simulation showed a latency of 2.18 ms and a throughput of 572.6 images per second, with a resource usage of 11,474 LUTs and 33 DSPs. Real-world execution achieved an effective throughput of 9,882 images per second.

In terms of classification performance, the model achieved 80% accuracy before quantization and 78% after Quantization-Aware Training (QAT). Final post-synthesis accuracy on the deployed FPGA is currently under evaluation.

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