California Institute of Technology (US)
Author in the following contributions
- Designing and Deploying Low-Latency Neural Networks on FPGAs with HGQ and da4ml
- End-to-End Neural Network Compression and Deployment for Hardware Acceleration Using PQuant and hls4ml
- Low-Latency Resource-Efficient GNNs for Jet Tagging on FPGAs
- Low-latency Jet Tagging for HL-LHC Using Transformer Architectures
- da4ml: Distributed Arithmetic for Real-time Neural Networks on FPGAs
