2–6 Feb 2026
TIFR, Mumbai
Asia/Kolkata timezone

The MDT Trigger Processor prototype for the ATLAS Level-0 Muon Trigger at HL-LHC

2 Feb 2026, 14:45
15m
TIFR, Mumbai

TIFR, Mumbai

Tata Institute of Fundamental Research, Homi Bhabha Road, Navy Nagar, Colaba, Mumbai 400005, India
Oral Trigger and DAQ hardware Parallel Session-V

Speaker

GKOUNTOUMIS, Panagiotis (University of California Irvine (US))

Description

The Monitored Drift Tube Trigger Processor (MDT-TP) is a major advancement in
the upgrade of the first-level muon trigger of the ATLAS Experiment during the
operation of the High-Luminosity LHC.

The MDT-TP interfaces the MDT front-end electronics with the ATLAS Trigger and
Data acquisition systems and helps to improve the muon trigger momentum
measurement reducing in parallel the fake muon trigger rate up to 70%. The
MDT-TP handles up to 240 optical links and introduces a unique design that
extends trigger capabilities to include Front-End configuration, environmental
monitoring, and data readout. One of the main challenges of the MDT-TP is to
meet the trigger performance requirements within a tight latency constraint.
These functionalities and requirements impose a demanding gateware design in
terms of FPGA hardware resources and timing closure.

Using a first prototype of the MDT-TP, extensive validation tests have been
carried out. The latest data acquired from the MDT cosmic stand for muon track
reconstruction and results from the prototype hardware testing, together with
recent firmware and software developments, will be presented

Position TBC
Affiliation TBC
Country TBC

Author

GKOUNTOUMIS, Panagiotis (University of California Irvine (US))

Presentation materials