2–6 Feb 2026
TIFR, Mumbai
Asia/Kolkata timezone

An FPGA based readout system for sub-nanosecond beam background characterization

2 Feb 2026, 17:00
15m
TIFR, Mumbai

TIFR, Mumbai

Tata Institute of Fundamental Research, Homi Bhabha Road, Navy Nagar, Colaba, Mumbai 400005, India
Oral Trigger and DAQ hardware Parallel Session-V

Speaker

EISELE, Florian

Description

Many facilities employ beam loss monitors that report time-averaged loss rates and do not support precise time-of-arrival measurements. We developed an FPGA-based readout system that, in combination with plastic scintillator detectors, enables beam loss measurements with sub-nanosecond time resolution over multi-second acquisitions. We commissioned this system at the (50 - 500 MeV) booster synchrotron of the Karlsruhe Research Accelerator (KARA). This measurement campaign demonstrated the potential of this new technique. First, we characterized the beam background with nanosecond-level timing precision. Second, we acquired the accelerator clock and injection triggers, in order to correlate the beam background with beam injection, storage and extraction. In addition, we showed versatility of the readout system to sample the signals of a stripline sensor at the KARA main ring. In this contribution, we present our FPGA based data acquisition system, highlight first commissioning results and discuss future applications of this technique.

Position Student
Affiliation Karlsruhe Institute of Technology
Country Germany

Authors

EISELE, Florian Dr SCOMPARIN, Luca (SLAC) HUMMER, Fabian (Karlsruhe Institute of Technology)

Co-authors

EL KHECHEN, Dima (KIT/LAS) STEINMANN, Johannes NOLL, Marvin (KIT - IBPT) SIMON, Frank (KIT - Karlsruhe Institute of Technology (DE))

Presentation materials