Speaker
SARADHY, Rohith
(University of Minnesota (US))
Description
We present an implementation of the digital dual mixer time difference (DDMTD) circuit in an ASIC using current mode logic (CML) and discuss how it can be used to stabilize on-detector systems to a level of less than 1 picosecond. The DDMTD circuit is used extensively in high energy physics applications and other clock distribution systems where precision timing is required. By using CML logic in an ASIC we have been able to optimize the design for the DDMTD application and have achieved a considerable performance enhancement over what has been achieved with logic blocks in an FPGA.
| Position | Researcher |
|---|---|
| Affiliation | The University of Minnesota |
| Country | USA |
Authors
FRAHM, Erich
(University of Minnesota (US))
RUSACK, Roger
(University of Minnesota (US))
SARADHY, Rohith
(University of Minnesota (US))
TOUSI, Yahya
VADNAIS, Emily