Speaker
Description
The OCTOPUS (Optimised CMOS Technology for Precision in Ultra-thin Silicon) project, part of the DRD3 collaboration, aims to simulate, develop, and characterise fine-pitch monolithic sensors using the 65 nm TPSCo CMOS process. The project targets a spatial resolution of 3 µm, a temporal resolution below 5 ns, a material budget of 50 µm of silicon equivalent, and an average power consumption below 50 mW/cm² to meet the requirements of vertex detectors in future lepton collider experiments.
OCTOPUS places significant emphasis on the extensive simulation effort, which aims to improve sensor layouts. This includes simulations of standard process sensor designs with different readout options and moderate pitches of ~20 µm, and a new n-Opt (Optimised) design, which benefits from both increased depletion volume and charge sharing mechanism.
The sensor simulation strategy combines TCAD static simulations using generic doping profiles, transient simulations and high-statistics Monte Carlo simulations, both of which are essential for guiding sensor design and performance optimisation.
To better link OCTOPUS R&D with the development of future lepton collider detectors, a connection between the sensor simulation and Key4hep full simulation will be established using lookup tables of propagated charges for the different sensor layouts designed within the OCTOPUS project.
This contribution presents simulation results for sensors with various pixel pitch configurations, including both standard and n-Opt layouts.
| Type of presentation (in-person/online) | in-person presentation |
|---|---|
| Type of presentation (I. scientific results or II. project proposal) | I. Presentation on scientific results |
