Speaker
Description
The HVCMOS technology is promising technology for tracking detectors at future experiments such as LHCb upgrade and Higgs factories, for its radiation hardness, fast charge collection and hence good spatial and timing resolution. Development of HVCMOS in smaller feature size will allow more functionalities in the same pixel area, and a reduced power consumption. We proposed a project to develop HVCMOS sensor prototypes using 55nm CMOS process based on initial validation of the process. A small Monolithic prototype sensor chip, COFFEE3, was submitted in January 2025 which features two pixel arrays with completely different readout architectures. Both are designed aiming at 10 micron spatial resolution and a few nanosecond timing resolution, with moderate power consumption. This talk will present the design and current test results of the COFFEE3 chips. Future development plan will also be briefly discussed.