28 September 2026 to 2 October 2026
Castelldefels, Barcelona, Spain
Europe/Zurich timezone

Session

ASIC & Timing

29 Sept 2026, 11:20
Castelldefels, Barcelona, Spain

Castelldefels, Barcelona, Spain

Hotel Rey Don Jaime

Presentation materials

There are no materials yet.

  1. Artur Apresyan (Fermi National Accelerator Lab. (US))
    29/09/2026, 11:20
    ASIC
    Oral

    We present the design and performance of the
    FCFD1.1 constant-fraction discriminator ASIC for precision
    timing detectors based on AC-LGAD sensors. The chip,
    implemented in 65 nm CMOS, achieves ~40 ps time resolution
    and 15–20 μm spatial resolution in beam tests, with full
    detection efficiency over the sensor surface. The design
    integrates on-chip time-walk correction, reducing reliance...

    Go to contribution page
  2. Ennio Monteil (Paul Scherrer Institute (CH))
    29/09/2026, 11:40
    ASIC
    Oral

    LIGHT01 (LGAD-based Integrated Granular Hybrid Timing ASIC) is the first prototype of a readout chip family specifically designed for Low Gain Avalanche Diode (LGAD) pixels. Designed in a 28nm CMOS technology, LIGHT01 incorporates a pixel matrix with 64 channels, each comprising a preamplifier, a discriminator and a time-to-digital converter (TDC), targeting a per-channel time resolution of...

    Go to contribution page
  3. Gianmario Bergamin (CERN)
    29/09/2026, 12:00
    ASIC
    Oral

    FastRICH is a 16-channel, radiation-tolerant front-end ASIC for the LHCb RICH detector upgrade at the High-Luminosity LHC. It delivers precise timestamping of single-photon signals at 40 MHz, with timing resolution better than 30 ps RMS. Compatible with different photodetectors, each channel integrates a low-noise analogue front-end, CFD and LED discriminators, and a TDC with 24.4 ps ToA and...

    Go to contribution page
Building timetable...