TWEPP26 Topical Workshop on Electronics for Particle Physics

Session

Modules

1 Oct 2026, 15:20

Castelldefels, Barcelona, Spain

2. Ultra-Low Latency Asynchronous Trigger Board for Calorimeter Prototype Tests at SPS

Emanuele Romano (Pavia University and INFN (IT))

01/10/2026, 15:20

Modules - Module, PCB and Component Design

Oral

This work presents the development of an ultra-low-latency asynchronous trigger board for testing calorimeter prototypes at CERN SPS. Standard NIM or FPGA-based solutions introduce excessive latency (60-70 ns), incompatible with the requirement that the trigger precede QDC signals by at least 15 ns. To meet this requirement, a custom board based on discrete NECL components was designed. The...

110. A flexible electronics and DAQ system for the Timepix4 ASIC

Dr Nicolo Vladi Biesuz (Universita e INFN, Ferrara (IT))

01/10/2026, 15:40

Modules - Module, PCB and Component Design

Oral

The INFN Data Acquisition system (IDAQ) is designed for data-driven readout of the Timepix4 ASIC, supporting simultaneous time-of-arrival and time-over-threshold measurements with nanosecond precision. The system architecture combines dedicated hardware for high-speed serial data transmission, FPGA-based data processing, and a Trigger Logic Unit for synchronization and timing distribution. It...

188. The ePIC dRICH RDO: an FPGA-based card for a photodetection integrated system

Sandro Geminiani (Universita e INFN, Bologna (IT))

01/10/2026, 16:00

Modules - Module, PCB and Component Design

Oral

The RDO (ReaDOut card) is the main board developed for the readout system of the dual-radiator RICH (dRICH) detector, designed for the ePIC experiment at the future Electron-Ion Collider (EIC). The dRICH DAQ system is organized in 1248 Photon Detection Units (PDU) each integrating 4 ALCOR64 ASICs connected to the RDO FPGA-based card, for reading up to 256 pixel SiPMs. This work discusses the...