Speakers
Description
For the deployment of machine learning (ML) models with strict requirements on latency and computing resources, field-programmable gate arrays (FPGAs) have emerged as a preferred hardware platform, as they offer low-level hardware control and easy reprogrammability. However, deploying models on these devices requires expert knowledge of dedicated programming techniques, such as high-level synthesis (HLS).
As a solution to this, hls4ml enables conversion of models from most standard ML libraries, such as Keras, PyTorch, etc., into optimized HLS code. To achieve the required latencies and computing resources, model compression techniques such as quantization-aware training (QAT) and pruning are essential. hls4ml supports most QAT libraries, such as QKeras v3, HGQ, and PQuantML.
This tutorial will cover the full hls4ml model conversion pipeline, from the training of small example models, model conversion into HLS code, and HLS synthesis to obtain FPGA resource estimates. Model compression with tools such as QKeras v3 and HGQ, and the impact on the inference performance on FPGAs, will be discussed as well.
| Tutorial level (only for Tutorial) | Newcomer |
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