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LPC Physics Forum - Topical discussion on HGCAL ECON by Jinglu Wang and Honor Hare

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https://cern.zoom.us/j/96898909340

    • 1
      ECON 101: overview of the endcap concentrator ASIC for the HGCAL Upgrade Project

      The High-Granularity Calorimeter (HGCAL) is a sampling calorimeter featuring fine readout segementation and is designed to withstand the high radiation environment of CMS forward regions during High Luminosity-LHC operations. The Endcap Concentrator (ECON) ASIC chips are part of HGCAL's front-end electronics required to compress data from over six million channels. ECON-T ASICs concentrate trigger information from each bunch crossing to the Level 1 Trigger rate of 40 MHz. ECON-D ASICs concentrate data packets for sending to the data acquisition system at the Level 1 Acceptance rate of 750 kHz. Each module on HGCAL will have a combination of ECON-Ts and ECON-Ds operating in parallel. This talk will discuss ECON architecture as well as quality control tests.

      Speakers: Honor Hare (University of Rochester), Honor Suzanne Hare (Duke University (US))
      23April2026_LPCPhysicsForum_HonorHare.mp4
      physicsForum_2026_0423_final.pdf
    • 2
      ECON 201: Trust the Process? ECON-D SRAM Performance Under Different Fabrication

      Full-functionality prototypes of two novel Endcap Concentrator (ECON) ASICs: ECON-T and ECON-D for CMS High-Granularity Calorimeter (HGCAL) upgrade were produced and characterized in 2021–2023, followed by an initial engineering run of 33k ASICs in 2024. Radiation testing of ECON-D from the engineering run revealed read errors in the on-chip SRAMs for a non-negligible subset of devices. Further investigation indicated that SRAM robustness is sensitive to fabrication-process parameters. To quantify and mitigate this sensitivity, a dedicated 2025 production of wafers was undertaken with a range of doping concentrations designed to tune the underlying transistor threshold voltage by 0%, 5%, 10%, and 15% from nominal. We present the measurements of ECON-D SRAM performance and power consumption for these four varieties of CMOS process.

      Speaker: Jinglu Wang (Northwestern University (US))
      23April2026_LPCPhysicsForum_JingluWang.mp4
      ECON201_ECOND-SRAM_Jinglu.pdf