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CERN STEAM Academy 2026 - Timetable & Lecture Programme
High-Performance Interconnection Networks
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Europe/Zurich
593/R-010 - Salle 11 (CERN)
Description
Course abstract:
The interconnection network is the backbone of supercomputers and datacenters, where hundreds of thousands of nodes cooperate to run computing- and data-hungry applications from fields such as medicine, climate research, video streaming, or generative AI. These applications generate countless communication operations the network must process as rapidly as possible, otherwise becoming the entire system bottleneck. The interconnection network must guarantee high communication bandwidth and low tail latency to these communications within a minimum power envelope, and this requires multiple innovations in routing algorithms, quality of service and power management. Unfortunately, network congestion, failures, and aggressive power management are likely to appear due to the increasing size of current supercomputers and datacenters, threatening the performance and operation of existing interconnection networks and drastically reducing the benefits of the mentioned innovations.
In this course, we will review the state of the art of high-performance interconnection networks used in Supercomputers and Datacenters. We will cover basic concepts, advanced network technologies and innovations in topologies, routing, congestion control, or power management. We also include several lab sessions where students will play with network simulators and networking administration, monitoring and programming using a real computing cluster. Finally, we will introduce the students to the last updates of the new ATLAS-CERN TDAQ system network, in which design we are currently contributing.
Lecturers Bio:
Jesus Escudero-Sahuquillo is a Full Professor at the Computing Systems Department (DSI) of the University of Castilla-La Mancha (UCLM), Spain. He received an MS and Ph.D in Computer Science from the UCLM in 2008 and 2011, respectively. In 2006, he joined UCLM as a Ph.D. student within the RAAP group at UCLM. In 2014, he moved to the industry and worked for Oracle (Norway) as a Ph.D. Senior Engineer. In 2015, he moved to the Technical University of Valencia (Spain) as a PostDoc research assistant, granted with a national competitive grant. In 2016, he joined the DSI at UCLM (Spain) again, with a 5-year PostDoc position funded by the UCLM and the European Commission (FSE funds). He achieved a permanent position at UCLM in 2020 and full professorship in 2025. He has contributed to over 60 papers in peer-reviewed international conferences and journals. His research interests include high-performance interconnection networks, and all the strategies related to improving them, such as congestion management, routing algorithms, network topologies, and power saving. He has supervised four doctoral thesis and tens of final degree and master projects. He has participated in several research projects funded by the European Commission and the Spanish Government. He has served as a program committee member and reviewer in several conferences and journals. He was the co-organizer during five editions of the IEEE International Workshop on High-Performance Interconnection Networks in the Exascale and Big-Data Era (HiPINEB).
Gabriel Gómez-López is a Computer Engineer and Researcher at the Albacete Research Institute of Informatics (I3A), Universidad de Castilla-La Mancha (UCLM), and currently a Postdoctoral Researcher at the Universitat Politècnica de València (UPV). He holds a PhD in Advanced Information Technologies (Cum Laude, December 2025), a Master's Degree (2021), and a Bachelor's Degree (2020) in Computer Engineering, all from UCLM. His research focuses on High-Performance Computing (HPC) interconnection networks and Data Centers, addressing topology implementation, congestion control, and exascale architecture simulation.
Carlos Medrano Navalón is a PhD student in Computer Science at CERN (ATLAS DAQ) and the Albacete Research Institute of Informatics (I3A), Universidad de Castilla-La Mancha (UCLM). He holds a Master's Degree (2023), and a Bachelor's Degree (2022) in Computer Engineering, all from UCLM. His research focuses on High-Performance Computing (HPC) interconnection networks and network simulation for the ATLAS DAQ Upgrade for the HL-LHC.
Alberto Merino is a PhD student in Computer Science at the University of
Castilla-La Mancha (UCLM), where he also earned his Bachelor's in
Computer Science (2022) and his Master's in Computer Engineering (2023). His research focuses on high-performance interconnection networks and congestion control techniques for supercomputers and data centers. He is currently on a research visit at ETH Zürich.