FPGA Programming: High Level Synthesis

by Sioni Paris Summers (CERN)

Monday 20 Jul 2026, 09:00 → Tuesday 21 Jul 2026, 16:00 Europe/Zurich

593/R-010 - Salle 11 (CERN)

Abstract

High Level Synthesis is the techniques and tooling around writing FPGA code in C++ that can be synthesized down to Hardware Description Language (HDL) code. This course teaches some of the key concepts of writing efficient high level FPGA code for physics. First of all, you will be introduced to numerics and arithmetic for FPGA, focussing on fixed point. Secondly, you will learn how to understand and optimize loops, about pipelining, and how to explore the tradeoff between area, throughput, and latency. Both of these concepts will be taught with some simple examples, including some by-hand calculations for fixed point arithmetic in the companion slides. You will put the techniques into practice by writing an algorithm to compute the missing transverse energy (MET) from a list of particles. Finally, we will put together what you've learned to run the algorithm on a pynq-z2 (time permitting).

The companion slides are available at the STEAM academy indico. These provide some important introduction to each topic, as well as the by-hand exercises for fixed point arithmetic.

The sections are, in order:

1. arithmetic
2. MET
3. pynq

Explore the readme files in the sub directories for details of how to get started!

Lecturer Bio 

I’m an applied physicst at CERN working on the Level 1 Trigger of the CMS Experiment at the LHC. For the Phase 2 Upgrade I develop fast and efficient physics reconstruction algorithms for FPGAs. I’ve contributed to track finding, vertex reconstruction, particle flow, pileup subtraction (PUPPI), jet reconstruction, electron identification, and providing a platform for particle-based algorithms.

I also develop algorithms and tools for machine learning in the trigger. I helped to deploy the first ML seed in the CMS trigger during LHC Run 3 in 2024, the anomaly detection trigger AXOL1TL. For the Phase 2 Upgrade of CMS I’m involved in several projects to enhance our data taking with ML, like jet tagging. I’m a task leader in the Next Generation Triggers project at CERN, leading efforts on deeply integrating ML into the CMS Phase 2 Trigger. On the ML tools side I created and maintain conifer for BDT inference on FPGAs, and I’ve previously been coordinator of hls4ml for NN inference on FPGAs.

I’m motivated to apply the techniques and technology we develop at CERN for fast ML inference in other areas as well. At the moment I’m working on a project, called Edge SpAIce, to use these tools for the detection of plastics pollution in the ocean onboard Earth Observation satellites. I’ve previously worked on a collaboration with autonomous vehicle company Zenseact.

Tutor Bio

I am a research fellow working on the CMS Level-1 trigger and design machine learning algorithms to make sub microsecond decisions whether to keep or discard incoming data. I specifically work on jet tagging algorithms and explore a range of different architectures and techniques to boost tagging performance while also reducing their inference latency and overall cost in hardware.

I am also interested in the impact of changing environments on trigger algorithms and how we can design robust machine learning or use continual learning to constantly update algorithms as the detector changes. I explore how different architectural considerations and learning techniques can change how an ML algorithm understands its training data and how that can help reduce the impact of noise in incoming data.

A further research area is in tree methods for fast machine learning, designing and implementing decision trees in firmware as well as method for updating them on the fly or self-updating learning.