28 July 2026
CERN
Europe/Zurich timezone

This hands-on workshop introduces the fundamentals of FPGA-based acceleration for machine learning applications. After a short introduction to FPGA architectures, high-level synthesis (HLS), and the hls4ml framework, participants will deploy and explore neural network models on FPGA hardware using PYNQ boards.

Through specific examples, participants will understand how to examine FPGA inference performance, analyze FPGA resource usage, and explore the trade-offs between model precision, latency, and hardware efficiency. 

Conference information

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All times are in Europe/Zurich

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CERN
513/1-024
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