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EP-ESE Electronics Seminars

Designing HEP circuits in 65nm

by Pierpaolo Valerio (Universita e INFN, Roma I (IT)), Dr Sandro Bonacini (CERN)

Tuesday 5 Jun 2012, 09:00 → 10:00 Europe/Zurich

13/2-005 (CERN)

13/2-005

CERN

90

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