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Intel / CERN openlab workshop on Advanced Parallelism and Tuning
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Europe/Zurich
Building 593 (CERN)
Building 593
CERN
Room 11
Description
Intel / CERN openlab workshop on Advanced Parallelism and Tuning
The modern computing era has seen an explosive growth of parallelism inherent in computing chips. Taking advantage of these new features is an opportunity, but also a challenge. To better prepare for the road ahead, Intel and CERN openlab are organizing an advanced workshop focused on parallel programming and tuning of software. The two day event, led by experts from Intel, will be split into two parts.
On the first day, Levent Akyil will demonstrate existing and upcoming elements of Intel Parallel Studio XE. Discussed advanced features will include the efficient usage of APIs to contextualize performance information, batch performance collection, loop analysis and instrumentation with the PIN tool. Although the main focus will be on the VTune™ Amplifier XE performance tuning tool, the Intel Inspector XE correctness checker and Advisor XE will also be discussed. The participants will be able to get hands on experience with the VTune™ Amplifier XE 2013 beta and see live demos.
On the second day, Hans Pabst will introduce advanced features of Intel Threading Building Blocks (Intel TBB), coupled with an introduction to the logic of Intel TBB and parallel programming patterns. A discussion of constructs such as parallel for, concurrent containers and interdependent tasks will be interspersed with hands-on labs.
About the speakers
Notes
To register, please go to http://indico.cern.ch/event/apt2012. Registrations are limited to approximately 45 participants and handled on a “first come–first served” basis. Attendees wishing to participate in the interactive hands-on need to bring their laptop, which will be used to access multi-core exercise servers. Please contact openlab.workshops@cern.ch if you have any questions.
The course will be given in English and is targeted at intermediate and advanced users. Please also note that familiarity with basic threading concepts, C/C++ and compilation techniques is a prerequisite. All Intel tools are provided for CERN users by CERN IT and openlab at no extra charge.
The modern computing era has seen an explosive growth of parallelism inherent in computing chips. Taking advantage of these new features is an opportunity, but also a challenge. To better prepare for the road ahead, Intel and CERN openlab are organizing an advanced workshop focused on parallel programming and tuning of software. The two day event, led by experts from Intel, will be split into two parts.
On the first day, Levent Akyil will demonstrate existing and upcoming elements of Intel Parallel Studio XE. Discussed advanced features will include the efficient usage of APIs to contextualize performance information, batch performance collection, loop analysis and instrumentation with the PIN tool. Although the main focus will be on the VTune™ Amplifier XE performance tuning tool, the Intel Inspector XE correctness checker and Advisor XE will also be discussed. The participants will be able to get hands on experience with the VTune™ Amplifier XE 2013 beta and see live demos.
On the second day, Hans Pabst will introduce advanced features of Intel Threading Building Blocks (Intel TBB), coupled with an introduction to the logic of Intel TBB and parallel programming patterns. A discussion of constructs such as parallel for, concurrent containers and interdependent tasks will be interspersed with hands-on labs.
About the speakers
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Levent Akyil is a staff software engineer and currently manages the EMEA Technical Computing, Analyzers, and Runtimes technical consulting engineering team within the Software & Services Group at Intel. Over the past 11 years, he has held several positions in various divisions at Intel. Akyil worked on various Itanium® platforms and enterprise MP Xeon® server projects before moving to his current role. Based in Munich, Germany, he provides technical consulting support for Intel® Software Development Products in EMEA. His team works with internal and external strategic customers providing enabling and optimization support on Intel products including Intel® Many Integrated Core architecture. Akyil has an MS in Computer Science and an MBA in Technology and Innovation Management. |
| Hans Pabst is a senior technical consultant engineer at Intel Corporation (SSG/DPD). He enables customers in the EMEA region to leverage Intel software developer products (performance libraries, compilers and tools). Hans’ focus is on parallel algorithms and programming models that target HPC and scientific applications. Before he joined RapidMind Inc. of Canada (acquired by Intel), Hans was part of the Virtual Reality Systems Group of Bauhaus University Weimar (Germany). Hans holds a Diploma in Civil Engineering and Computer Science (Dipl.-Ing.). |
To register, please go to http://indico.cern.ch/event/apt2012. Registrations are limited to approximately 45 participants and handled on a “first come–first served” basis. Attendees wishing to participate in the interactive hands-on need to bring their laptop, which will be used to access multi-core exercise servers. Please contact openlab.workshops@cern.ch if you have any questions.
The course will be given in English and is targeted at intermediate and advanced users. Please also note that familiarity with basic threading concepts, C/C++ and compilation techniques is a prerequisite. All Intel tools are provided for CERN users by CERN IT and openlab at no extra charge.
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