Speaker
Clint Allan Richardson
(Boston University (US))
Description
The two-level trigger system employed by CMS consists of the Level 1 (L1) Trigger, which is implemented using custom-built electronics, and the High Level Trigger (HLT), a farm of commercial cpus running a streamlined version of the offline CMS reconstruction software. The operational L1 output rate of 100 kHz, together with the number of cpus in the HLT farm, imposes a fundamental constraint on the amount of time available for the HLT to process events. Exceeding this limit impacts the experiment's ability to collect data efficiently. Hence, there is a critical need to characterize the performance of the HLT farm as well as the algorithms run prior to startup in order to ensure optimal data taking. Additional complications arise from the fact that the HLT farm consists of multiple generations of hardware and there can be subtleties in machine performance. We will present our methods of measuring the timing performance of the CMS HLT, including the challenges of making such measurements. Results for the performance of various intel Xeon architectures from 2009-2014 and different data taking scenarios will also be presented.
Primary author
Clint Allan Richardson
(Boston University (US))
