19–24 Feb 2007
Univ. of Technology
Europe/Zurich timezone

R&D for a monolithic pixel sensor based on 150 nm fully-depleted SoI CMOS technology

21 Feb 2007, 18:10
20m
HS1 (Univ. of Technology)

HS1

Univ. of Technology

Wiedner Hauptstrasse 8-10 Vienna, Austria
Contributed Talk Session 6

Speaker

Toru Tsuboyama (KEK)

Description

The effort to develop a monolithic pixel sensor based on the SOI (silicon on insulator) CMOS technology is presented. In SOI, MOS transistors are produced on silicon oxide layer (BOX) above a silicon substrate. A monolithic pixel detector is realized if we adopt a high-resistivity silicon and p-type and n-type implantations can be made in the substrate. The charge induced in the substrate by photons or charged particles is processed by the CMOS circuit above the BOX. In 2005, an R&D has started based on fully-depleted SOI of OKI Electric Industry Co. Ltd. and several types of TEG were fabricated and tested. We present the basic characteristics of the SOI technology, properties of the high-resistivity substrate and its functionality, and, test results of TEGs including a 32x32 matrix pixel detector, which successfully detected small signals for laser light and a β source. Finally, we cover the prospect of 2007 R&Ds.

Primary author

Presentation materials