BE/BI Technical board on fast sampling electronics

Thursday 12 Jun 2014, 09:30 → 12:00 Europe/Zurich

866 2-D05 (CERN)

The meeting is aimed at clarifying specifications and technical choices for (mainly) Fast BLM acquisition electronics in terms of sampling speed and memory depth.

notes Notes_from_BITB_12-6-2014.docx Notes_from_BITB_12-6-2014.pdf

09:30 → 09:40 Reminder of specifications

Speaker: Mr Jean-Jacques Gras (CERN)

Slides

• BLM-Fast+.pdf
• BLM-Fast.pdf
• BLM-Fast+.pptx
• BLM-Fast.pptx

09:40 → 09:50 Discussion

09:50 → 10:10 Use of log-amp or limiting amplifier

Speaker: Dr Hermann Schmickler (CERN)

Slides

• HS_Version1.xlsx
• HS_Version2.xlsx
• TML9002.pdf

10:10 → 10:20 Dicussion

10:20 → 10:40 VFC with masses of DDR memory instead of SRAM

Speaker: Andrea Boccardi (CERN)

Slides VFC-HPC-SRAM2DDR.pdf VFC-HPC-SRAM2DDR.pptx

10:40 → 10:50 Discussion

10:50 → 11:10 Update on Fast Sampling Mezzanines for the VFC

Speaker: Dr David Belohrad (CERN)

11:10 → 11:20 Discussion

11:20 → 11:40 Proposal for electronics

Speaker: Bernd Dehning (CERN)

Slides BI-TB_fast_aqui_20140612.pdf BI-TB_fast_aqui_20140612.pptx

11:40 → 12:00 Discussion