Feb 15 – 19, 2016
Vienna University of Technology
Europe/Vienna timezone

The ALPIDE Pixel Sensor Chip for the Upgrade of the ALICE Inner Tracking System

Feb 18, 2016, 12:20 PM
20m
EI8 (Vienna University of Technology)

EI8

Vienna University of Technology

Gusshausstraße 27-29, 1040 Wien
Talk Electronics Electronics

Speaker

Gianluca Aglieri Rinella (CERN)

Description

The ALPIDE chip is a CMOS Monolithic Active Pixel Sensor being developed for the Upgrade of the Inner Tracking System (ITS) of the ALICE experiment at CERN Large Hadron Collider. ALICE is the first experiment at LHC implementing a large detector with MAPS technology. The ALPIDE chip is implemented with a 180~nm CMOS Imaging Process and fabricated on substrates with a high-resistivity epitaxial layer. It measures 15~mm by 30~mm and contains a matrix of 512$\times$1024 pixels with in-pixel amplification, shaping, discrimination and multi-event buffering. The readout of the sensitive matrix is hit driven. There is no signaling activity over the matrix if there are no hits to read out and power is consumed proportionally to the occupancy. The requirements on detection efficiency above 99\%, fake-hit probability below $10^{-5}$, spatial resolution of $5~\mu m$ are met. The capability to read out Pb-Pb interactions at 100~kHz is provided. The power density of the ALPIDE chip is projected to be less than ${\rm 35~mW/cm^2}$ for the application in the Inner Layers and below ${\rm 20~mW/cm^2}$ for the Outer Barrel Layers, where the occupancy is lower. This contribution will describe the architecture, design and main features of the final ALPIDE chip, planned for submission at the beginning of 2016. Early results from the experimental qualification of the pALPIDE-3 full scale prototype predecessor will also be reported.

Primary author

Presentation materials