11th Workshop on Electronics for LHC and future Experiments

ALICE HLT-RORC with Xilinx Virtex4

Not scheduled

1m

Heidelberg

Poster Programmable Logic and Embedded Processing

Speaker

Mr Torsten Alt (Kirchhoff Institute of Physics)

Description

The ALICE HLT-RORC, a FPGA based PCI card, will be the link between the front-end electronics of the detector and the Front-End processors in the High Level Trigger. Equipped with the new Xilinx Virtex4 LX40 FPGA a fast PCI 64/66 interface and up to two optical links the card will not only be able to inject the raw detector data into the memory of the Trigger farm, it also provides the possibility of processing the raw data “on the fly” inside the FPGA. A fast clusterfinder algorithm in hardware already exists and a Hough tracker is currently under development.

Summary

Three years ago, a first iteration of the HLT-RORC has been successfully developed
to explore the possibilities of an FPGA based PCI card as both a receiver card for
the raw data coming from the detector and an online processor for processing the
raw data. Each RORC was able to hold one optical link to receive the data and
sending it via the PCI bus directly into the main memory of the Front-End
processors, the first stage of an online reconstruction framework called High Level
Trigger. The concept has proven to work in various internal tests as well as in the
TPC Front-End electronics integration tests in April 2004 at CERN.
In parallel two approaches for online processing on the card has been investigated.
One is a fast clusterfinder for the TPC based on the offline algorithm; the second
is a Hough tracker for the TPC. Both algorithms were adapted to the requirements of
FPGA based computation, means additions, multiplications and Look-Up tables. It
has shown that the cluster finding can be done completely inside the FPGA while the
Hough tracker requires Look-Up tables stored in an external memory device.
These results together with the latest improvements in the FPGA technologies made
it obvious to redesign the first version of the HLT-RORC. The choice of the device
for the new card, a Xilinx Virtex4 LX40, reflects the experience made within the
last three years. The LX family provides a large number of I/Os which makes it
possible to implement a PCI 64/66 interface, two optical links and four independent
banks of fast DDR-SDRAM on the new card. The four independent banks, each 16bit
wide, can be used combined or separately thus allowing it to have several Hough
tracker in parallel, each with its own Look-Up tables in one bank.
In addition to the large number of I/Os, the LX40 has 64 internal digital
processing units, the DSP slices, Each DSP implements a 18x18 multiplier combined
with a 48bit accumulator capable of running with up to 500MHz and will replace the
old combinatorial arithmetic in the clusterfinder and in the future Hough tracker
thus giving a considerable improvement in processing power. To take into account
that future upgrades or algorithms may require a reconfiguration of the card or
exchange of information between the cards, a smart configuration scheme and a fast
serial link between the cards will be implemented.
This configuration scheme is based on an onboard flash and a small CPLD and will
allow configuring the card remotely over PCI even in case that the current design
in the FPGA is corrupted and the connection via PCI will be lost.