Speaker
Description
Summary
The future TeV-scale linear collider ILC (International Linear Collider) offers a
large variety of precision measurements complementary to the discovery potential of
the LHC (Large Hadron Collider). To fully exploit this physics potential, a vertex
detector of unprecedented performance is needed. By moving the innermost layer very
close to the interaction point (r=15mm), the occuring background by beamstrahlung
becomes unusually high for an e+/e- collider (80 hits/mm²/bunch train). To keep the
occupancy of the detector at a reasonable level line rates of up to 40MHz are
needed.
Offering an excellent signal to noise ratio, DEPFET pixels are one promising
approach for the ILC vertex detector. The DEPFET concept integrates a FET into the
high resistivity detector substrate. After the amplification, the signal of the
device is the transistor current proportional to the initially generated charge in
the detector. With the DEPFET concept noise figures of a few 100e- ENC are possible
at the required readout rates.
For the readout of such a DEPFET pixel system, the ASIC CURO II (Current ReadOut)
has been designed. The full blown, 128 channel chip is 4.5 x 4.5 mm² large and has
been fabricated in a 0.25 µm process.
The readout concept of the CURO chip is completely current based perfectly adapted
to the signal mode of the sensor. Designing the chip, the properties of a current
memory cell have been studied in detail in order to optimize the speed and noise
performance. Several of these current memory cells are used in the analog front end
to perform a fast Correlated-Double-Sampling. This achieves a pedestal subtraction
as well as a suppression of the 1/f components of the sensor noise. After a current
compare, zero suppression is done by a hit finding logic arranged in parallel which
identifies up to 2 hits within less than 10ns, more than a factor of two faster
than needed for the expected occupancy at the ILC. Stand alone measurements at
~25MHz line rate of the analog part of the chip show an INL (Integral Non-
Linearity) of about 2% for a dynamic range of several mips and a capacitive load of
10pF.
The noise contribution has been measured to ENC = 45e- (considering an internal
amplification of 1nA/e- of the DEPFET sensor).
A complete ILC DEPFET-system equipped with a 64x128 pixel DEPFET matrix (with
~30x30 µm² pixel size) has been operated successfully using the CURO II chip. The
system has been operated in the lab for the spatial detection of 6keV photons
achieving a noise level of ENC < 250 e-. Furthermore, the system was used in a 4GeV
electron test beam at DESY to study the spatial resolution and tracking efficiency
of the sensor.
