Speaker
Description
Summary
One single node of the TPC Front End Electronics chain consists of up to 26 Front
End Cards (FECs) connected to a Read Out Control Unit (RCU). A Detector Control
System (DCS) board and a Source Interface Unit (SIU) of the DDL sit on top of the
RCU board. The DCS-board is in charge of monitoring and controlling the system,
while the RCU, SIU and the FECs are part of the data-path of the system. Each card
is equipped with an industry standard SRAM based FPGA and peripheral components.
SRAM-based FPGAs are chosen because this technology offers great flexibility, but
as the Front End Electronics will be operated in a radiation environment of up to
800 hadrons/cm2sec, single event upsets in the configuration memory is a major
concern.
Several beam tests have been performed so that the best suited components for a
radiation environment are chosen. Proton beams at Louvain, at the Cyclotron in Oslo
and at TSL in Uppsala have been used to test Altera, Xilinx and Actel FPGAs, as
well as different power regulators and other components. The number of single event
upsets in the FPGAs has been carefully registered, and the results of these tests
have been important in the choice of FPGA in the final hardware design. The beam
tests that typically last for about hours are performed with much higher
intensities than what the system will be exposed to in real-life. This gives a dose
that is equal or higher to what the electronics is exposed to during the lifetime
of the experiment, giving a test of the endurance of the components.
Because the RCU board is part of the data-path, it is of high importance that
single-event upsets will not interrupt the operation of the firmware. To minimize
the risk of this, a Xilinx Virtex-II Pro FPGA was chosen because it offers an
option of active reconfiguration. Active reconfiguration means that the
configuration memory of the FPGA can be refreshed without having any effect on the
operation of the firmware in the FPGA. It is also possible to read back the
configuration data and validate it with the original bit-stream. On the RCU, this
feature is supported by adding an auxiliary flash based FPGA and a Flash memory,
both which are radiation tolerant. The configuration files are stored on the flash
memory and the auxiliary FPGA communicates with the configuration pins on the
Xilinx FPGA, configuring the FPGA either from the Flash memory or the DCS board.
Beam tests of the DCS-board itself has been performed with a proton beam at TSL in
Uppsala. The complete setup, including FECs, RCU, DCS, SIU and Trigger system will
be tested using a lower intensity neutron beam at TSL in order to verify the
radiation tolerance. At this beam test the system will run normal operation with
data-taking, and the software and firmware used are fully functional prototype
versions of the final design.
