12–16 Sept 2005
Heidelberg
Europe/Zurich timezone

Optical Multiplexer Board Final 9U Design for ROD/TileCal System

Not scheduled
1m
Heidelberg

Heidelberg

Germany
Poster

Speaker

Dr Jose Torres (University of Valencia, Spain)

Description

TileCal is a redundant data acquisition system. Two optical fibers carry the same data from front-end electronics to ROD system. This is necessary because of radiation phenomena could cause malfunctions inside front-end electronics, and bit and burst errors over data ready to be transmitted to ROD motherboard. Unfortunately, ROD card has only one input connector for each data, because the original design responds to initial specifications. Optical Multiplexer Board final module has been designed to readout redundant output data from FEBs and send correct data to motherboards of the RODs. The motherboard design is a 9U VME64x slave module which has eight channels.

Summary

TileCal is the hadronic calorimeter of the ATLAS experiments. It consists,
electronically speaking, of 10000 channels to be read each 25 ns. Data gathered
from these channels are digitized and transmitted to the data acquisition system
(DAQ) following the assertions of a three level trigger system.
In the acquisition chain, place is left for a system which has to perform pre-
processing and gathering on data coming out after a good first level trigger before
sending them to the second level. This system is called the Read Out Module (ROD).
TileCal is a redundant data acquisition system. Two optical fibers carry the same
data from front-end electronics to ROD. This is necessary because of radiation
phenomena could cause malfunctions inside front-end electronics, and bit and burst
errors over data ready to be transmitted to ROD card. Unfortunately, ROD card has
only one input connector for each data, because the original design responds to
initial specifications.
Our primary target is to improve error tolerance, designing a pre-ROD card, called
Optical Multiplexed Board (OMB), able to analyze two fibbers, both of then carrying
the same data, to provide the correct one to the ROD input.
The interest of this project was justified in February 2003, when a preliminary
study appeared. This proposal shown a solution for OMB based on exhaustive on-line
analysis of the data carried by both of the fibbers, using FPGAs for
implementation. This architecture was called as "MiniROD“, because it follows a ROD-
like design
Universidad de Valencia – IFIC (Spain) team showed the greater interest to deal
with this project, to make a first prototype to study technical viability. In
particular, the main goals are:
• Fibberoptic switching to take advantage of redundancy
• Obtain real (production) costs
• Have a development platform (hw - sw)
• Try different alternatives for data error analysis (CRC, etc.)
A new functionality for OMB was proposed by IFIC team. Since they have design
responsibilities about ROD project, it was suggested a function mode called “Data
Injector Mode”, to use the OMB like data pattern injector towards ROD for test and
verification uses.
Optical Multiplexer Board final module has been designed to readout redundant
output data from FEBs and send correct data to motherboards of the RODs. The
motherboard design is a 9U VME64x slave module which has eight channels.
This project started in October 2004. The construction of a final 9U OMB prototype
is about to finish today. It is anticipated to have it on time for verification
next testbeam at CERN in Summer 2005.

Author

Dr Jose Torres (University of Valencia, Spain)

Co-authors

Mr Alberto Valero (IFIC, Spain) Dr Enrique Sanchis (University of Valencia, Spain) Dr Jesus Soret (University of Valencia, Spain) Mr Jose Castelo (IFIC, Spain) Dr Juan Valls (IFIC, Spain) Dr Julio Martos (University of Valencia, Spain) Dr Vicente Gonzalez (University of Valencia, Spain)

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