12–16 Sept 2005
Heidelberg
Europe/Zurich timezone

Performance Studies of the radiation hard 0.25µm BEETLE frontend chip for the LHCb Silicon Tracker

Not scheduled
1m
Heidelberg

Heidelberg

Germany
Poster

Speaker

Mr Stefan Koestner (CERN/University Zurich)

Description

The BEETLE frontend chip is a 128 channel radiation hard analog read-out chip using commercial 0.25µm CMOS technology designed by the ASIC lab in Heidelberg. The BEETLE is used at the LHCb experiment, currently under construction at the Large Hadron Collider at CERN. It operates at 40 MHz and saves events into a pipeline with a maximum latency of 160 clock cycles. We summarise here the results of a series of testbeam experiments on prototype ladders for the LHCb Silicon Tracker with a 120 GeV/c π־ beam. The performance of the BEETLE frontend chip is studied with respect to the highly constrained requirements for LHC.

Summary

The BEETLE frontend chip will be used to read out silicon strip detectors in the
main tracking devices of the LHCb experiment, e.g. Vertex Locator (VELO), Pile-Up,
Inner Tracker (IT) and Trigger Tracker (TT). The BEETLE design foresees a variable
shaping time in order to adopt for the different geometries and hence strip
capacitances of the silicon sensors to be read out. The total capacitance at the
input node can be as high as 57pF as it is the case for the TT-station. Simulation
studies show that a S/N ratio higher than 12 at a signal remainder in the next
bunch crossing, 25 ns later, of less than 30% and 50% for the Inner Tracker and the
TT-station, respectively, is required. In addition to the variable feedback
resistance in the shaper, the feedback resistance in the preamplifier can be
changed, as well as their bias settings.
We explored this parameter space with respect to noise, signal remainder, crosstalk
and undershoot. These parameters are highly dependent on the total capacitance at
the input node of the BEETLE preamplifier. By varying the trigger latency high
statistics pulse shape scans were performed at different BEETLE settings.
Four ladders with different geometries were tested at the same time. Two were
consisting of multigeometry sensors, on which three regions could be fully
illuminated. This allowed to study the shaping performance as a function of both
the internal BEETLE settings and the total sensor capacitance at the input node. An
analytic function was derived to model the response of the BEETLE frontend in
order to derive the various parameters. The detailed understanding of the response
of the BEETLE frontend chip is important for the commissioning of the Silicon
Tracker.
The fast read-out requirements imply the risk of signal loss by ballistic deficit.
Bias voltage scans were performed for different shaping times to study whether full
charge collection efficiency for all ladder thicknesses under test is achieved.
We found that the BEETLE performs well according to its requirements. In addition
we gained a deeper understanding on the various sources of noise and crosstalk in
our measurements. These studies were completed with additional laboratory
measurements using a 1063 nm Nd:YAG laser diode and simulation studies.

Author

Mr Stefan Koestner (CERN/University Zurich)

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