Speaker
Description
Summary
An intelligent coordinator for the readout of groupings of pixel
readout chips, the Token Bit Manager (TBM), has been developed for the
CMS experiment at LHC. To reduce readout dead time, the TBM needs to be
located as close as possible to the readout chips. This forces
developing this electronics in a rad-hard process.
Implied by its name, the Token Bit Manager will coordinate passing of
the readout token around a group of from 8 to 24 readout chips. Each
arriving Level 1 trigger will be assigned an 8 bit event number and
8-bits of error status. This information will be placed on a 32
event deep stack awaiting its associated token pass. This data will be
supplied to the DAQ along with header, and trailer ID's as wrapper to
the combined readout chip analog encoded data stream, to facilitate
event recognition, and alert the DAQ of problems in the readout
chain.
Also present on the same rad-hard chip is a Communication Control Hub,
implemented with a 40 Mhz, differential, serial protocol similar in
struction to I2c. This protocol will be used to provide command
structures and parameter modifications for the TBM itself as well as
for all readout chips. The procedure and timing constraints for setting and
refreshing some 30M pixel trim settings will also be presented.
Several test results from resent submissions in 0.25u will be presented.
These include radiation and low temperature testing, as well as results of
using the TBM as the core of the control hardware for the Forward Pixel
testbeam.
