10-14 October 2016
San Francisco Marriott Marquis
America/Los_Angeles timezone

Multi-threaded ATLAS Simulation on Intel Knights Landing Processors

13 Oct 2016, 14:00
15m
GG C1 (San Francisco Mariott Marquis)

GG C1

San Francisco Mariott Marquis

Oral Track 2: Offline Computing Track 2: Offline Computing

Description

The Knights Landing (KNL) release of the Intel Many Integrated Core (MIC) Xeon Phi line of processors is a potential game changer for HEP computing. With 72 cores and deep vector registers, the KNL cards promise significant performance benefits for highly-parallel, compute-heavy applications. Cori, the newest supercomputer at the National Energy Research Scientific Computing Center (NERSC), will be delivered to its users in two phases with the first phase online now and the second phase expected in mid-2016. Cori Phase 2 will be based on the KNL architecture and will contain over 9000 compute nodes with 96GB DDR4 memory. ATLAS simulation with the multithreaded Athena Framework (AthenaMT) is a great use-case for the KNL architecture and supercomputers like Cori. Simulation jobs have a high ratio of CPU computation to disk I/O and have been shown to scale well in multi-threading and across many nodes. In this presentation we will give an overview of the ATLAS simulation application with details on its multi-threaded design. Then, we will present a performance analysis of the application on KNL devices and compare it to a similar study done on a traditional x86 platform (NERSC's Edison) to demonstrate the capabilities of the architecture and evaluate the benefits of utilizing KNL platforms like cori for ATLAS production.

Tertiary Keyword (Optional) Processor architectures
Secondary Keyword (Optional) Parallelizarion
Primary Keyword (Mandatory) Simulation

Primary author

Steven Andrew Farrell (Lawrence Berkeley National Lab. (US))

Presentation Materials