In this talk we discuss the feasibility of replacing telecom-class routers with a topology of commodity servers acting as software switches in data acquisition. We extend the popular software switch, Open vSwitch, with a dedicated, throughput-oriented buffering mechanism. We compare the performance under heavy many-to-one congestion to typical Ethernet switches and evaluate the scalability...
The need for FPGAs in DAQ is a given, but newer systems needed to be designed to meet the substantial increase in data rate and the challenges that it brings. FPGAs are also power efficient computing devices. So the work also looks at accelerating HEP algorithms and integration of FPGAs with CPUs taking advantage of programming models like OpenCL. Other explorations involved using OpenCL to...
In this talk I will present my efforts to implement a data transfer mechanism for the Intel Xeon Phi Coprocessor and its integration in the ZeroMQ message queue library. The latter is used extensively at CERN to support online and offline processing. Finally I will share my experience in the CERN openlab ICE-DIP project.
This talk briefly discusses the vectorization problem and how it impacts scientific and engineering systems. A simple cost model of designing such system in context of different phases of software lifetime is considered. Finally a concept for scalable solution is presented.
