CRU Weekly Meeting

Wednesday 12 Oct 2016, 10:30 → 12:30 Europe/Zurich

CERN

CRU Weekly meeting (12 October 2016)

Present: Erno, Sanjoy, mazsi, Alex

Secretary: Erno(9), PiPPo(7), Shuaib(1), mazsi(5)

Actions:

• We will sent out a questionnaire today to the subdetectors regarding the clock/trigger distribution and the CRU hardware needs.

Report on Actions:

• Still no access to the Arria 10 development kit in Kolkata (we need to upgrade to CentOS 7 on the server, fix the user access rights, etc).

1. 10G PON

• Mazsi - No update from Altera on 2UI error.

2. GBT

• Erno - Ability to switch between the GBT and widebus mode has been added to GBT component (and also the ability to completely bypass the decoder and the descrambler to get the raw payload). Up to now only tested in simulator. Need to verify in synthesis that the timing is not ruined.
• Erno - Initial CRU specific Avalon interconnect for single master and multiple slaves. Tested in simulation inside the GBT component. Needs further verification with the integrated design.
• Timing errors in the integrated design (Mazsi tried to reduce the RX clock fan-out and area lock the RX part but there is still problems).

3. DCS

Pippo worked on the IC/EC component.
Sanjoy is started to add the I2C and SCA modules to the PCIe DMA simulation environment.

4. PCIe

• Sanjoy - Now the DMA reuses the "dead time" (performance gain).
• Timing issues in the integrated design (recovery error in the dual clock FIFO part, etc)
• The current DMA throughput is around 13.68 Gb/s (only Gen2 x4, limited by the Attila board).

5. Integration

• Mazsi is working on the data path (not ready).

AOB

• Alex - What is the production status in India?
• Alex - Did we started to use the remotely accessible PCIe40 cards provided by the LHCb?

Vacations

• PiPPo: on conference 10-14 October, on leave until 7 November (but can work remotely).
• mazsi: Oct 13-18: at Wigner / Budapest.