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BI/TB on LN4 for BI and Future for Rad-Hard links
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Europe/Zurich
866/2-D05 (CERN)
L4 BI Performance
- All BI installed apart from
- 4 WS that failed VSC acceptance - feed-through issue being solved
- Devices to be put at HST location as of April 2017 for reliability run
• 2 SEM grids + 1 WS
• 2 BCTs
• 1 BPM
- Laser Emittance Meter
- Mechanics installation in May
- Electronics commissioning in June
- Status & Issues
- BCT readings in front of dumps
- SEM Grids
- Some wires giving perturbed signals
- Bad contacts suspected
- LEBT SEM grids at source test stand
- Removed with several broken wires
- Refurbish in next weeks with new PCBs
- Need to find way to interlock pulse length when grids in to avoid damage
- WS
- FESA server modified to allow PPM acquisition
- Not used extensively in 2017 - needs further assessment
- BPM
- New SW for trajectory operational
- Work on FESA server for Time of Flight in development
- BSM
- 2 monitors in expert mode
- VME electronics & OP GUI to be made operational
- BLM
- Diamond BLMs - noise issue understood (cabling to OASIS)
- Thresholds to be studied during reliability run
- H0/H-
- Large disturbances every 1.2s
- Coming from bumper magnets
- Stable for given bumper current
- New VME card nearly ready hoping to solve major issues
- Calibration on-going
- Large disturbances every 1.2s
- HST-BTV
- To observe beam & stripping foil
- Minor mechanical issue leads to slightly tilted screen for IN position
- Fixed for final installation
- Several foils broken when moving BTV
- Being investigated - not understood
Next Generation Rad-Hard Links
Near-term:
Standard Back-end - VFC
Standard Front-end - GEFE
GEFE Main components
- VTRx
- Rad hard optical transciever
- Bi-directional at 4.8Gbps (Versatile link)
- Available SM & MM
- GBTx
- Rad hard ASIC
- Single electrical link with VTRx at 4.8Gbps
- Multiple electrical links with front-end electronics
Back-end
- SFP+ & GBT-FPGA
- Based on commercial components
- SFP+ - COTS bi-directional link at up to 10Gbps (SM or MM)
- GBT-FPGA
- HDL code emulating GBTx (Altera or Xilinx)
Longer-term (LS3 / HL-LHC):
Front-end:
- VTRx+ single mode (SM)
- MM under development by EP
- SM under development by EP in collaboration with BI
- LpGBTx+
- Low power GBTx
VTRx+ SM
Current VTRx orders - 1000 for BI (500 for QP & 500 for BL - both foreseen for SPS)
- InGaAs photodiode
- Transimpedance amp
- Laser & laser driver
Receiver Optical Sub-assembly - ROSA
- Assembly for current generation ongoing
- Could add production for future needs
- Use R2E funds?
Transmitter Optical Sub-assembly - TOSA
- Obsolete laser diode
- MS done & test samples procured
- Rad tolerance is main selection criterion
- Tests planned for April 2017
Laser Driver
- Current
- GBLD v4.2 rad-hard ASIC
- Can drive edge-emitting lasers & VCSELs
- Max data rate 5Gbps
- New driver
- Can work up to 10Gbps
- Only drives VCSELs SM (not many companies providing MM VCSELs)
ACTION:
- BI to provide specifications
- Specifications
- Radiation tolerance?
- Temperature range?
- Max link-length & breakpoint number?
- Magnetic field?
- Do we need 10Gbps?
- Rough estimation of number of modules
- Specifications
- BI to liaise with CO
LpGBTx
Driver ASIC
- Input/Output towards "optical link"
- Downlink 2.56Gb/s
- FEC12 encoding (can correct up to 12 errors)
- Uplink 5.12 & 10.24 Gb/s
- FEC12: 3.84 & 7.68 Gb/s
- FEC5: 4.48 & 8.96 Gb/s
- Downlink 2.56Gb/s
- e-links
- 16 links to front-ends
- 80-320 Mb/s (16 - 4 links)
- 28 links from front-end to ASIC
- 160 - 1280 Mb/s (28 - 6 links)
- Clock I/O
- 16 links to front-ends
- Fixed latency
- Clock jitter < 5ps rms
- Rad hardness 2MGy
ACTION:
Completion of production 2019.
Need input for mid-2018
- ~30CHF per ASIC
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