Speaker
Description
As the HV-CMOS technology is emerging as a prime candidate for many future experiments in particle physics, it is a priority for the RD50 collaboration to develop and study particle detectors in this technology. In this context, the collaboration has started a new effort to design and manufacture dedicated test structures and matrices of HV-CMOS and HV-MAPS pixels. Two HV-CMOS submissions are foreseen at the moment with the collaboration. The first one is an MPW to test the technical design aspects and basic functionality of the sensing diodes and readout electronics. In contrast, the second submission is a large area demonstrator to probe into more advanced features, such as improving the sensor time resolution, implementing novel sensor cross-sections and studying pre-stitching options. The MPW is mandatory to guarantee the success of the large area and thus more expensive demonstrator. Present measurement plans with both submissions include irradiations with a wide range of fluences. Both submissions are in the 150 nm HV-CMOS technology node from LFoundry, as this offers several attractive features that can be beneficial for particle detectors.
This contribution describes the status of the two HV-CMOS submissions mentioned above, paying special attention to the very recent MPW. In particular, I will review the main design aspects of the prototype as well as the TCAD simulations done in parallel to optimize the sensor layout. I will also give details about the timeline of this project and how we will proceed with measurements. More information will be given at the workshop.
