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EP-ESE Electronics Seminars
FinFET technologies for Digital Systems with Radiation Requirements: TID, SEE, Basic Mechanisms and Lessons Learnt
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Europe/Zurich
222/R-001 (CERN)
Description
Migration of CMOS technology from the traditional planar gate to a 3D device geometry has enabled continued downscaling of feature sizes below the 25-nm node. With this reduction in feature size comes with some key benefits, chiefly amongst these is higher performance with less power consumption. These improvements have led to improvements in high-performance computing and wide spread adoption of artificial intelligence, among many other applications. Along with the commercial application space, there is a desire to field FinFET technologies for high-reliability applications including those where radiation is a primary component of the device reliability. This talk will focus on the implications of radiation on transistor-level device and circuit operation of 14/16-nm FinFET technologies.
Michael King received the B.S. degree in applied mathematics from the University of California at Los Angeles, and M.S. and Ph. D. degrees from Vanderbilt University in electrical engineering. He worked as a Postdoctoral Appointee at Sandia National Laboratories in Albuquerque, NM in the areas of power semiconductor devices, resistive non-volatile memory, and advanced CMOS devices. He is currently a senior member of the technical staff at Sandia National Laboratories where his primary role is process integration and device design for advanced systems. His research focuses on pathfinding for reliability and radiation effects in highly-scaled (<45-nm) SOI and FinFET technologies.
