Intel PSG Product Roadmap

• Christian Stenzel (Intel PSG)

Room: 31/3-004 - IT Amphitheatre Stratix10 presentation "Intel® Stratix® 10 FPGAs and SoCs deliver breakthrough advantages in performance, power efficiency, density, and system integration: advantages that are unmatched in the industry. Featuring the revolutionary Intel HyperFlex™ FPGA Architecture and built on the Intel 14 nm Tri-Gate process, Stratix 10 devices deliver 2X core performance gains over previous-generation, high-performance FPGAs with up to 70% lower power.†" (from https://www.altera.com/products/fpga/stratix-series/stratix-10/overview.html )

OpenCL workshop

• Suleyman Demirsoy (Intel PSG)

Room: 31/3-004 - IT Amphitheatre - OpenCL workshop – session based on CERN example - HLS presentation "Intel® HLS Compiler is a high-level synthesis (HLS) tool that takes in untimed C++ as input and generates production-quality register transfer level (RTL) that is optimized for Intel FPGAs. This tool accelerates verification time over RTL by raising the abstraction level for FPGA hardware design. Models developed in C++ are typically verified orders of magnitude faster than RTL." (from https://www.altera.com/products/design-software/high-level-design/intel-hls-compiler/overview.html )

Round-table discussion Room: 31/3-004 - IT Amphitheatre