The CMS Phase 2 upgrade is developing a new backend system for the Tracker subdetector. The goal is to propose a generic ATCA hardware platform for three different purposes.
First, the Inner Tracker (IT) Data Trigger and Control (DTC) - that will be responsible to receive, format and organize the data coming from the Pixel Detector. It will be an interface between the Inner Tracker and the Data Acquisition (DAQ) system. Second, the Outer Tracker (OT) DTC - that will be responsible to receive, format and organize the data coming from the Strip Detector. It will be an interface between the Outer Tracker, the L1 Tracking Trigger (L1TT) system and the DAQ system. Finally, the L1TT system - that will be responsible to receive the pre-trigger data from the OT-DTC, to perform a pattern recognition algorithm, to find tracks with energy greater than 2 GeV and to discard the low energy tracks. The IT-DTC and OT-DTC systems have massive communication requirements. In other hand, the L1TT system has massive processing requirements. Thus, is a challenge to build a hardware platform that could give support for those different systems.
The KIT institute is prototyping an ATCA hardware platform based on having a generic motherboard that support customization with daughter FPGAs connected through interposers. The control and management are centralized in a Multiprocessor System-on- Chip (MPSoC) Zynq Ultrascale + (US+) device. The Zynq device will concentrated two main tasks. First, FPGA remote programming and debugging services, like IPbus, AXI Chip-to- Chip (C2C), SPI, JTAG, among other services. The environment will be based on a Linux box implemented over the Application Processing Unit from Zynq. And second, the communication between the ATCA blade and the Shelf manager using IPMI protocol. The IPMC functionality, implemented over a FreeRTOS in the Real-Time Processing Unit, will run the ATCA requirements for the communication and will perform the sensor monitoring.
The KIT approach is a centralized slow control and board management solution for the backend system hardware platform. The advantage is to reduce board complexity, to save investments and to optimize power payload usage.