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HLS4ML: Using ML on FPGAs to enhance reconstruction output

Name: HLS4ML: Using ML on FPGAs to enhance reconstruction output
Start: 2019-02-13T18:00:00+01:00
End: 2019-02-13T19:00:00+01:00
Location: CERN

Wednesday 13 Feb 2019, 18:00 → 19:00 Europe/Zurich

40/R-C10 (CERN)

40/R-C10

CERN

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Description

Recorded Meeting Video: https://www.youtube.com/watch?v=bZQ3oKbOKM0

- 1
  
  Using ML on FPGAs to enhance reconstruction output
  
  Speaker: Dylan Sheldon Rankin (Massachusetts Inst. of Technology (US))
  
  irishep_dsr_hls4ml_13feb2019.pdf
- 2
  
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HLS4ML: Using ML on FPGAs to enhance reconstruction output

40/R-C10

CERN

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