Expected performance testchip A: Bandgaps

• Gianluca Traversi (Universita and INFN (IT))
• Gianluca Traversi (University of Bergamo)

Room: 14/4-030 - performance studies: across temperature, across radiation, combined - differences wrt to RD53A bandgaps in performance

Expected performance testchip A: SLDO part

• Andreas Stiller (Fachhochschule Dortmund)
• Michael Karagounis (University of Bonn (DE))

Room: 14/4-030 - performance across temperature, across radiation, combined - differences wrt to RD53A SLDO performance - differences in layout wrt to RD53A and 2.0ASLDO testchip (before RD53A)

Summary of all simulations of testchip A

• Alvaro Pradas Luengo (Aragon Institute of Technology (ES))

Room: 14/4-030 - Summary of simulations done with testchip v1 - Vref cap variations - Oscillations when using USP VS type of load (ohmic, DC) - Startup: differences seen in simulation wrt to RD53A (oscillations, needed current) - Behavior with USP deactivated (not disconnected) - Other effects seen in simulation to be verified with measurements

testchip A measurements

• Dominik Koukola (Vienna University of Technology (AT))

Room: 14/4-030 - Thermal effects - Irradiation results - USP VS type of load

Discussion for further steps

• Gianluca Traversi (University of Bergamo)
• Gianluca Traversi (Universita and INFN (IT))
• Michael Karagounis (University of Bonn (DE))
• Andreas Stiller (Fachhochschule Dortmund)

Room: 14/4-030 - Critical items for testchip v2 - Major differences in performance expected in the next version - First things to test/validate if it arrives before the review - Improvements in the startup