Speakers
Description
Improving the characterization of microscopic surface electronic properties is necessary for the miniaturization of electronic devices. Specifically, achieving the ultimate goal of miniaturization, which involves atomic-scale devices such as atomic-scale logic gates [1] and memories [2] composed of dangling bonds on hydrogen-terminated Si surfaces, demands characterization of ultra-small one- and two-dimensional structures.
While imaging, fabricating, and measuring of local electronic properties of these ultra-small structures can be performed with a one-probe scanning tunneling microscope (1P-STM), assessing the electrical conduction properties lateral to the surface requires a two-probe (2P-) and four-probe (4P-) scanning tunneling microscope (STM). The advantage of 4P-STM conductance measurement over 2P-STM is that it can eliminate the probe-to-surface contact resistance and Schottky barrier in semiconductor samples. Yet, it is an arduous task to place four probes into a nano-scale region. Here, we propose a method to solve the considerable contact resistance issue with the 2P configuration [3]. Cleaning tip apices by field evaporation ensured metallic probes that produced linear IV curves on the metallic Si(111)-(7 × 7) surfaces and eliminated the problem of the Schottky barrier. By employing the Ohmic 2P-STM method, we measured the surface conductance on the Si(111)-(7 × 7) surface at low bias voltages that limited conduction through bulk states. Furthermore, we created nano and atomic scale regions on the surface of Si(111)-(7 × 7) and H-Si(100) using STM lithography and measured their conduction properties by utilizing the Ohmic 2P-STM.
References:
[1] T. Huff et al., Nat. Electron. 1, 636 (2018).
[2] R. Achal et al., Nat. Commun. 9, 1 (2018).
[3] J. Onoda et al., ACS Nano 15, 19377-19386 (2021).
