Speaker
Grzegorz Jan Wegrzyn
(AGH-UST)
Description
We present the design of the integrated circuit named SMAUG_ND_1 which implements the prototype of the method of indirect voltage measurement by measuring the noise distribution curve [1]. The IC is designed in a CMOS 28nm process. The die size is 1x1mm2 and contains a 7x7 matrix with 68 µm pixel pitch. The chip allows testing of the prototype method in coincidence with the CDS algorithm.
[1] G. Węgrzyn, R. Szczygieł, Przegląd Elektrotechniczny, 10/2021, 161-163
We acknowledge funding from the Polish Ministry of Science and Education (MEiN) (Research Project 0138/DIA/2020/49).
Primary authors
Grzegorz Jan Wegrzyn
(AGH-UST)
Robert Szczygiel
