9–11 Mar 2011
CERN
Europe/Zurich timezone
There is a live webcast for this event.

A sub-set of ATA over Ethernet as the control protocol in xTCA

10 Mar 2011, 19:15
3h 45m
Globe 1st Floor (CERN)

Globe 1st Floor

CERN

Speaker

Dr David Sankey (RAL)

Summary

Both ATLAS and CMS are considering xTCA as replacement for VME based systems
in their upgrades. An ethernet based protocol is an agnostic choice for module control in both ATCA and uTCA.

A sub-set of the simple storage area network protocol ATA over ethernet could satisfy the requirements for module configuration and control without incurring the overheads of running IP on an FPGA.

Members of the RAL ATLAS and CMS trigger groups are investigating implementing this sub-set in the first instance using a Xilinx development board and replacing the UDP/IP layer in the existing CMS IPBus protocol.


Both ATLAS and CMS are considering xTCA as replacement for VME based systems in their upgrades. ATCA defines a base fabric interconnect on the back plane which, if implemented, is ethernet and uTCA defines a similar fabric interconnect which is either ethernet or PCI-express. An ethernet based protocol is therefore an agnostic choice for module control in both ATCA and uTCA.

The first level trigger systems will be predominantly implemented with FPGA devices. Existing ethernet based FPGA control solutions, whether commercial or home grown, are predominantly based on UDP/IP. However in the storage area network arena there exists an open source protocol at the ethernet level which is supported in the Linux kernel and which has minimal requirements on the module, namely ATA over ethernet (AoE). A sub-set of this, namely the configuration and control part rather than the actual ATA payload, could satisfy the requirements for module configuration and control.

Members of the RAL ATLAS and CMS trigger groups are investigating implementing this sub-set using a Xilinx Virtex5 development board connected to a private managed ethernet switch, alongside a conventional Linux based ATA over ethernet set-up. In the first instance this consists of monitoring the network traffic involved in AoE device discovery and then implementing this on the FPGA. The second step consists of overloading the AoE configuration and control with the CMS IPBus command set, thereby giving a complete system for module control in both ATCA and uTCA.

Authors

Dr David Sankey (RAL) Mr Tim Durkin (RAL)

Presentation materials