Introduction

• Ralf Spiwoks (CERN)

Room: 40/S2-A01 - Salle Anderson

Application of MPSoC on the ATLAS L0Muon Sector-Logic blade: Control and single-board DAQ for commissioning

• Akihiro Mishima (University of Tokyo (JP))

Room: 40/S2-A01 - Salle Anderson Apart from the SoC use case for the ATLAS muon TGC front-end electronics, which we (the UTokyo team) presented in the previous meetings, we are also working on ATLAS L0 Muon Endcap Sector Logic. This time, we would like to introduce our SoC-related study on the endcap SL. We use Enclustra commercial mezzanine card (with XCZU5EV device) on the SL for control and testing purposes. In the initial commissioning, we have implemented a control interface of the SL board (to be interfaced to the ATLAS Run Control application in the future) and also a single-board DAQ system for the testing purpose by interfacing the SoC device to the main FPGA (XCVU13P) on the SL. We want to share our experience of the implementation, integration, and commissioning from these studies.

CMS HGCal and gitlab chain

• Arnaud Steen (National Taiwan University (TW))

Room: 40/S2-A01 - Salle Anderson

Kria, Split Boot and beyond – An Update of the Serenity group's ZynqMP activities

• Marvin Fuchs (KIT - Karlsruhe Institute of Technology (DE))

Room: 40/S2-A01 - Salle Anderson

Common Operating System for Front-end Computers and SoCs in CERN-ATS

• Federico Vaga (CERN)

Room: 40/S2-A01 - Salle Anderson This presentation provides an overview on the ongoing project in CERN-ATS for the next Front-End Computer Operating System replacing CentOS 7. The project aims at providing a general purpose OS targeting x86_64 and aarch64 architecture. The presentation will touch the following points: - Operating System building process - Network booting infrastructure - GRUB as the main bootloader for both x86_64 and aarch64

DMA transfers between PL and PS on MPSoC from user space without custom kernel driver

• Hampus Sandberg (CERN)

Room: 40/S2-A01 - Salle Anderson

Deploying and testing firmware/software on Zynq MPSoC with GitLab CI/CD pipelines

• Vasileios Amoiridis (CERN)

Room: 40/S2-A01 - Salle Anderson