Jun 21 – 24, 2022
CERN
Europe/Zurich timezone

Session

Monolithic devices

Jun 24, 2022, 9:00 AM
6/2-024 - BE Auditorium Meyrin (CERN)

6/2-024 - BE Auditorium Meyrin

CERN

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  1. Tilman Rohe (Paul Scherrer Institute (CH))
    6/24/22, 9:00 AM

    The high energy physics group of PSI is involved in the CMS experiment. Since 2018 the group is also gaining experience in monolithic devices. This talk gives a summary of the group's DMAPS activities.

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  2. Francisco Rogelio Palomo Pinto (Universidad de Sevilla (ES))
    6/24/22, 9:20 AM

    Highly integrated and very low power microelectronics, as required by Read Out Chips, represents a challenge because maximum performance and minimum power consumption are opposite design requirements. Quasi Floating Gate transistors are a solution because they allow independent control of transistor static and dynamic operation: AC and DC input terminals are different. The DC input terminal...

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  3. Niels Sorgenfrei (Albert Ludwigs Universitaet Freiburg (DE))
    6/24/22, 9:40 AM

    As a result of a CERN market survey, CMOS sensors in pixel and strip geometries were developed. The CMOS process is an established commercial industry process, which a lot of foundries utilize to produce silicon type devices. Typical CMOS foundries are equipped for bulk productions, but only for sensors much smaller than what is needed in e.g. the strip region of the ATLAS Inner Tracker. To...

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  4. Jernej Debevc (Jozef Stefan Institute (SI))
    6/24/22, 10:00 AM

    The CERN-RD50 collaboration has been developing radiation hard High Voltage CMOS detector prototypes based on high resistivity substrate and large collection electrode, manufactured in LFoundry 150 nm process. In this contribution we will present measurements of timing properties of the RD50-MPW2 chip, which features an 8 x 8 matrix of active pixels with integrated analog front end and...

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  5. Chenfan Zhang (University of Liverpool (GB))
    6/24/22, 10:50 AM

    The CMOS Working Group of CERN-RD50 has designed and submitted RD50-MPW3, which is the third High Voltage CMOS (HV-CMOS) pixel chip developed by the collaboration to further study these sensors for future physics experiments. The design of RD50-MPW3 incorporates the lessons learnt from the previous two chips, RD50-MPW1 and RD50-MPW2. It inherits the structures for high breakdown voltage and...

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  6. Patrick Sieberer (Austrian Academy of Sciences (AT))
    6/24/22, 11:10 AM

    This contribution can be seen as a continuation of the talk “RD50-MPW3: General details and pixel matrix”. This presentation focuses on the digital periphery of the chip and how it is integrated to the DAQ system, thus it is discussing a distinct topic.
    A brief overview of the digital periphery is followed by a more detailed introduction of the data acquisition concept and software. The main...

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  7. Francisco Rogelio Palomo Pinto (Universidad de Sevilla (ES))
    6/24/22, 11:30 AM

    Particle detectors systems need state of the art Data Acquisition Systems as backend. DRAD (Data Readout for Advanced Designs) is a a new DAQ with a client-server data architecture able to handle up to 4 Hybrid Pixel Detectors simultaneusly. At the present, DRAD operates with the OC4SENS read-out chip but is easily adaptable to other pixel detectors. The DAQ is based on a System-on-Module...

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  8. Eva Vilella Figueras (University of Liverpool (GB))
    6/24/22, 11:50 AM
  9. Michael Moll (CERN)
    6/24/22, 12:20 PM
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