29 May 2023 to 1 June 2023
Santiago de Compostela
Europe/Madrid timezone

Enhancing scalability of quantum circuits through gate cutting

Not scheduled
20m
Santiago de Compostela

Santiago de Compostela

Poster

Speaker

Guillermo Díaz Camacho (CESGA)

Description

In the NISQ era, quantum algorithms are limited to circuits with reduced size. Hybrid classical-quantum algorithms, such as Variational Quantum Algorithms (VQAs), aim to solve the depth bottleneck problem by repeatedly running shallow parameterized circuits. However, the number of qubits in available QPUs and the memory in classical computers limit VQAs' applicability.
With the aim of building a High-Performance Quantum Computing environment, we combine HPC techniques with gate cutting to enhance scalability. This way, we can sequentially execute parts of a quantum circuit with fewer qubits or in parallel in separate computers.
Here, we simulate two-qubit gates using only local gates through quasi-probabilistic decomposition, both for toy models and VQAs. While this method introduces an overhead in the number of required executions, this cost can be reasonable for low-depth quantum circuits, such as Variational Quantum Eigensolver (VQE) circuits. We explore the potential of gate cutting in VQE problems to reduce, first, the effect of noise on the ground state energy and, second, simulation resources.

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