-
13:45
Tree Tensor Network inference on FPGA
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Lorenzo Borella
(Universita e INFN, Padova (IT))
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14:05
Porting MADGRAPH to FPGA using High-Level Synthesis (HLS)
-
Hector Gutierrez Arance
(Univ. of Valencia and CSIC (ES))
-
14:25
Transferring HLS-generated BDT model into existing firmware in the ATLAS Level-1 trigger
-
David Reikher
(Tel Aviv University (IL))
-
14:45
Hardware acceleration for fast Magnetic Resonance Fingerprinting map reconstruction: FPGA porting of a deep learning algorithm
-
Mattia Ricchi
(University of Pisa & INFN, Bologna (IT))
Camilla Marella
(University of Bologna)
-
15:05
Resource-efficient FPGA implementation of a channelization stage for superconducting quantum detectors DAQ systems
-
Timo Muscheid
-
15:25
Qibosoq: an open-source framework for quantum circuit RFSoC programming
-
Rodolfo Carobene
