Speaker
Description
This work focuses on Total Ionizing Dose (TID) test of LVDS receivers that will be used for the readout system of the ATLAS muon barrel spectrometer within the High Luminosity (HL)-LHC program. We designed an experimental setup that allows to investigate TID effects on power consumption and signal integrity, including variations in amplitude, rise/fall time, jitter, signal-to-noise ratio, as well as inferring on bit error rate. This TID test are being conducted at CERN CC60 facility that is equipped with a ~ 10 TBq 60Co radioactive source. After the irradiation, annealing effects will be assessed.
Summary (500 words)
The High-Luminosity LHC (HL-LHC) program will deliver pp collisions at $\sqrt{s}=7$ TeV with an instantaneous luminosity $L=5\times10^{34}$ cm$^{-2}$ s$^{-1}$. These unprecedented beam conditions are challenging for the reliability of electronic components and materials. Along this line, we are carrying out radiation testing of critical parts of the Resistive Plate Chambers (RPCs) readout system of the ATLAS muon barrel spectrometer. Data-Collector-Transmitter (DCT) boards will receive the RPC front-end strips signals and adapt them to the LVDS standard, will apply a zero-suppression algorithm and will transmit data to the Barrel Sector Logic (SL) over optical fibers. LVDS receivers will be used to convert the differential data stream into unipolar signals. A total of 1600 DCT boards will be part of the HL-LHC muon trigger front-end electronics. Monte Carlo simulations predict a Total Ionizing Dose (TID) of 82.6 Gy in the Barrel Inner Large (BIL) chamber sector.
In this work, we discuss the TID testing of LVDS receivers. To this aim, a “Main” Printed Circuit Board (PCB) housing 10 LVDS receivers (left figure), and other two PCBs for input and active load, have been designed and realized at INFN Naples Unit. The input PCB is equipped with an LVDS driver that outputs 4 differential signals from the single-ended input signal. A flat cable transports the 4 differential signals on the main PCB, where they are fed in parallel into the 4 differential gates of each LVDS receiver. The 40 single-ended gate signals (40 = 10 LVDS receivers * 4 outputs / LVDS receiver) are sent from the LVDS receivers to the active load PCB through another flat cable. The selection of the gate signal is achieved by 4 (4-to-1) multiplexers, whose enable bits are controlled by means of the GPIO pins of a Raspberry Pi mounted on the active load PCB. This experimental setup has been designed such that only the main PCB is in the controlled area, while both the input and active load PCBs are remotely controlled from outside. A picture of the experimental setup under test, without the main PCB, is shown in figure (right). Input signals are provided through a Tektronix AFG31152 function generator. An Agilent N6705B DC Power Analyzer supplies voltage and measures the LVDS receivers power consumption. The oscilloscope waveform analysis will be also made through eye diagrams that allow quantifying variations in amplitude, rise/fall time, jitter, signal-to-noise ratio, as well as inferring on bit error rate. This TID test is being carried out at the CC60 facility at CERN that is equipped with a ~ 10 TBq 60Co radioactive source. The measurement of the dose on the PCB is based on radiochromic films that have been pre-calibrated at ISOF-CNR 60Co-Gammacell at Bologna, Italy. After the test, the annealing of the LVDS receivers will be assessed. Finally, a second set of LVDS receivers is exposed up to ~ 10 kGy to study the behavior of LVDS receivers in a wider dose range.
